An aging-aware transistor sizing tool regarding BTI and HCD degradation modes

Author

Hellwege, Nico ; Heidmann, Nils ; Erstling, Marco ; Peters-Drolshagen, Dagmar ; Paul, Steffen

Author_Institution

Inst. of Electrodynamics & Microelectron. (ITEM.me), Univ. of Bremen, Bremen, Germany

fYear

2015

Firstpage

272

Lastpage

277

Abstract

In this paper we present a tool based approach for an aging-aware design method. Extending the g^m/I^D sizing method by operating point-dependent degradation caused by BTI and HCD enables an innovative design flow. This design flow considers performance characteristics for a fresh circuit and also those of a degraded circuit at design time. Once the degradation from a single transistor is computed, the GMID-Tool does not need any further SPICE or aging simulation. The impact of the change in design methodology is shown for a typical differential amplifier structure.

Keywords

ageing; circuit stability; differential amplifiers; hot carriers; integrated circuit design; integrated circuit modelling; BTI; GMID-tool; HCD degradation modes; SPICE; aging simulation; aging-aware design method; aging-aware transistor sizing tool; bias temperature instability; design methodology; differential amplifier structure; hot carrier degradation; innovative design flow; point-dependent degradation; Aging; Degradation; Integrated circuit modeling; Mathematical model; Transconductance; Transistors; Aging-aware design; bias temperature instability (BTI); circuit degradation; hot carrier degradation; transconductance efficiency;

fLanguage

English

Publisher

ieee

Conference_Titel

Mixed Design of Integrated Circuits & Systems (MIXDES), 2015 22nd International Conference

Conference_Location

Torun

Print_ISBN

978-8-3635-7806-0

Type

conf

DOI

10.1109/MIXDES.2015.7208525

Filename

7208525