DocumentCode
1688564
Title
Multi-Rate Latency insertion Method for the Fast Transient Simulation of Large Networks with Nonlinear Termination
Author
Tsuboi, Noritake ; Asai, Hideki
Author_Institution
Shizuoka Univ., Hamamatsu-shi
fYear
2006
Firstpage
137
Lastpage
140
Abstract
In this paper, the authors propose a fast transient simulation technique using multirate LIM (latency insertion method). In this work, the time step size is selected according to the LC value of each part in the given network. Then, this method can reduce the calculation costs without violating the stability condition. Finally, some circuit simulations of the example networks including linear and nonlinear elements are performed by the proposed method. From the simulation results, the validity and the efficiency of this technique is verified
Keywords
circuit simulation; nonlinear network analysis; transient analysis; circuit simulations; fast transient simulation; large networks; multirate latency insertion method; nonlinear termination; Circuit analysis; Circuit simulation; Circuit stability; Costs; Crosstalk; Delay; Iterative methods; RLC circuits; Substrates; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2006 IEEE
Conference_Location
Scottsdale, AZ
Print_ISBN
1-4244-0668-4
Type
conf
DOI
10.1109/EPEP.2006.321211
Filename
4115371
Link To Document