DocumentCode
1691829
Title
High-order low-distortion switched-current cascade 2–2–2 ΣΔ modulator
Author
Blumer, Rafael T. ; Prior, Cesar A. ; Aguirre, Paulo C. ; Martins, João B.
Author_Institution
Fed. Univ. of Santa Maria, Santa Maria, Brazil
fYear
2012
Firstpage
1
Lastpage
4
Abstract
This paper presents the design and simulation results of a switched-current (SI) MASH 2-2-2 Sigma-Delta Modulator (ΣΔM). The modulator makes use of a low-distortion swing suppression topology which is highly suitable for wideband and high-order modulators. Simulation results reveal that peak signal to noise plus distortion ratio (SNDR) is 83.5 dB at 5 MHz sampling rate with 10 kHz bandwidth. The modulator was designed in a 0.6 μm CMOS technology and the power dissipation is about 45 mW.
Keywords
CMOS integrated circuits; delta-sigma modulation; CMOS technology; SI MASH 2-2-2 ΣΔM; SNDR; bandwidth 10 kHz; frequency 5 MHz; high-order low-distortion switched-current cascade 2-2-2 ΣΔ modulator; high-order modulators; low-distortion swing suppression topology; power dissipation; signal to noise plus distortion ratio; size 0.6 mum; CMOS integrated circuits; Modulation; Quantization; Sigma delta modulation; Silicon; Switches; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (LASCAS), 2012 IEEE Third Latin American Symposium on
Conference_Location
Playa del Carmen
Print_ISBN
978-1-4673-1207-3
Type
conf
DOI
10.1109/LASCAS.2012.6180322
Filename
6180322
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