Evaluation of process variability on current for nanotechnologies devices

The continuous shrinking of devices has introduced new challenges to integrated circuit design, mainly to deal with the parametric variations in process parameters. This paper presents an evaluation of the process variability on the current Ids of nanotechnologies devices, individually and simultaneously, taking into account the correlation among them. The results show that the deviation from mean value is quite significant ≈ 16% for high performance models. The variation of L has the dominant effect on the overall variation of the device in high performance models while the dominant effect on the overall variation of the device in low power models still being due to Vth variations. Lastly, the effect of process parameter variations deteriorates with technology scaling, with a considerable increase in the deviation from the 22 nm to 16 nm technology.