DocumentCode
1693043
Title
Modeling of performance-related design trade-offs in multi-chip assemblies
Author
Palusinski, Olgierd A. ; Hohl, Jakob H.
Author_Institution
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
fYear
1991
Firstpage
333
Lastpage
336
Abstract
The authors discuss the need for development of global performance measures for multi-chip microelectronic assemblies and systems. In particular, electrical performance measures of memory assemblies and their dependence on design parameters were studied. Models of pertinent components of electronic systems, such as off-chip drivers and receivers, and chip-to-chip signal transmission lines were used to evaluate essential properties of memory modules. The read access time was selected as a measure of performance of those modules. Using simple modeling this measure is related to basic parameters such as conductor geometry, substrate material thickness and permittivity, I/O pitch in chip carriers and chip access time. The specific memory module considered shows strong dependence of performance measure on materials used in its construction. The relationships between systems performance, materials properties, and geometry are described by analytic approximations; however, more accurate modeling will use look-up tables and specialized computer programs. Development of suitable computer support for system design based on developed models of performance is discussed
Keywords
modelling; modules; packaging; semiconductor storage; I/O pitch; MCM; chip access time; chip carriers; chip-to-chip signal transmission lines; computer support; conductor geometry; design parameters; global performance measures; memory assemblies; microelectronic assemblies; modeling; multi-chip assemblies; performance-related design tradeoffs; permittivity; read access time; substrate material thickness; Assembly systems; Conducting materials; Electric variables measurement; Microelectronics; Particle measurements; Permittivity measurement; Semiconductor device measurement; Solid modeling; Time measurement; Transmission line measurements;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronics Manufacturing Technology Symposium, 1991., Eleventh IEEE/CHMT International
Conference_Location
San Francisco, CA
Print_ISBN
0-7803-0155-2
Type
conf
DOI
10.1109/IEMT.1991.279808
Filename
279808
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