P-type isolated GGNMOS with a deep current path for ESD protection

In this paper, we propose a P-type Isolated GGNMOS (PI-GGNMOS) with a deep current path to improve holding voltage (Vh) of Electro-Static Discharge (ESD) protection device. In order to make the deep current path under the channel, the proposed ESD protection device has a p-type stud between source and the channel, compared to the conventional GGNMOS (Gate-Grounded NMOS). To verify the performance of the proposed structure, we simulated and measured the test structure that is fabricated in a 0.35μm Bipolar-CMOS-DMOS (BCD) process. We found that the proposed structure improves the holding voltage from 6.4V to 8.48V for 5V GGNMOS at 5.3μm pitch. In case of conventional 7V GGNMOS at 7.0μm pitch, the holding voltage is 8.7V. Therefore, we can use 5V PI-GGNMOS as a 7V ESD protection device with 32 % pitch reduction compared to conventional 7V ESD device without any additional process. The actual size of ESD cell is saved by 42.3%, considering It2. This improvement is attributed to the p-type stud which reduces gain and extends effective base width of parasitic NPN in GGNMOS. Consequently, the PI-GGNMOS can apply for upper range ESD protection at same cost.