Relation between the leakage currents and defects in oxide and interface Si/SiO2 in MOS devices

The augmentation of integration density is associated to the reduction of elementary dimensions composing integrated circuits. This reduction entails very important electric fields in the transistor channel, which favor the injection of hot-carriers in the gate oxide. This injection is translated by the creation of defects at the interface Si-SiO₂, and in the oxide and it is accompanied with the apparition of the leakage currents, in particular the gate current and the substrate current which are the origin of the degradation of MOS performances and its reliability. The target of this work is to model the leakage currents in relation to spacial distributions of defects situated at the interface and in the oxide for a better understanding of the physical mechanisms of degradation and to assess the impact of these defects on the aging phenomenon. The results of the given models and simulation, obtained with the 2D device simulator MINIMOS 4, permit one to distinguish the different types of defects, and to evaluate their extent during aging. This study shows that the charges in the oxide affect the gate current while the interface states affect the substrate current. Only the defects type acceptor, situated in the oxide and/or at the interface are responsible for the aging of an NMOS transistor. Our results for the given models and simulation may be used for the optimization of technological stages in order to minimize the influence of the hot-carriers on the aging phenomenon