Discrete cosine transform generator for VLSI synthesis

Author

Hunter, Jill ; McCanny, John V.

Author_Institution

Sch. of Electr. Eng. & Comput. Sci., Queen´´s Univ., Belfast, UK

Volume

5

fYear

1998

Firstpage

2997

Abstract

A generator for the automated design of discrete cosine transform (DCT) cores is presented. This can be used to rapidly create silicon circuits from a high level specification. These compare very favourably with existing designs. The DCT cores produced are scaleable in terms of point size as well as input/output and coefficient wordlengths. This provides a high degree of flexibility. An example, 8-point 1D DCT design, produced occupies less than 0.92 mm² when implemented in a 0.35 μm double level metal CMOS technology. This can be clocked at a rate of 100 MHz

Keywords

CMOS digital integrated circuits; VLSI; circuit CAD; digital signal processing chips; discrete cosine transforms; high level synthesis; 0.35 micron; 100 MHz; 8-point 1D DCT design; DCT cores; VLSI synthesis; application specific DSP cores; automated design; clock rate; coefficient wordlength; discrete cosine transform generator; double level metal CMOS technology; high level specification; input/output wordlength; point size; silicon circuits; CMOS technology; Circuits; Digital signal processing chips; Discrete cosine transforms; Image coding; Image processing; Silicon; Speech coding; Transform coding; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Acoustics, Speech and Signal Processing, 1998. Proceedings of the 1998 IEEE International Conference on

Conference_Location

Seattle, WA

ISSN

1520-6149

Print_ISBN

0-7803-4428-6

Type

conf

DOI

10.1109/ICASSP.1998.678156

Filename

678156