Modeling interface fracture in flip chip assembly

Author

Pang, H.L.J. ; Zhang, X.R. ; Shi, X.Q. ; Wang, Z.P.

Author_Institution

Sch. of Mech. & Production Eng., Nanyang Technol. Univ., Singapore, Singapore

fYear

2002

fDate

6/24/1905 12:00:00 AM

Firstpage

1757

Lastpage

1761

Abstract

A flip chip assembly with underfill delamination subjected to thermal cycling loading was investigated using the finite element method and interface fracture mechanics. Numerical evaluation of the mixed mode stress intensity factors and mode mixing parameter for interface cracks located at the silicon/underfill and silicon/FR4 interfaces was carried out. Four types of delamination conditions in flip chip assembly were modeled. The variation of mode mixing and stress intensity factors along with crack length and the variation within a whole thermal cycle are analyzed. The comparison of the results between different conditions is also presented.

Keywords

chip-on-board packaging; crack-edge stress field analysis; delamination; finite element analysis; flip-chip devices; fracture mechanics; thermal stress cracking; Si; finite element method; flip chip assembly; interface cracks; interface fracture mechanics; interface fracture modeling; mixed mode stress intensity factors; mode mixing parameter; numerical evaluation; silicon/FR4 interfaces; silicon/underfill interfaces; solder bumped flip chip on board assembly; thermal cycling loading; underfill delamination; Assembly; Delamination; Finite element methods; Flip chip; Production engineering; Silicon; Soldering; Space technology; Thermal loading; Thermal stresses;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2002. Proceedings. 52nd

ISSN

0569-5503

Print_ISBN

0-7803-7430-4

Type

conf

DOI

10.1109/ECTC.2002.1008349

Filename

1008349