DocumentCode
1700756
Title
System on chip with 1.12mW-32Gb/s AC-coupled 3D memory interface
Author
Canegallo, R. ; Perugini, L. ; Pasini, A. ; Innocenti, M. ; Scandiuzzo, M. ; Guerrieri, R. ; Rolandi, P.L.
Author_Institution
STMicroelectronics, Agrate, Italy
fYear
2009
Firstpage
463
Lastpage
466
Abstract
An AC-coupled 3D memory interface for chip-to-chip communication is implemented in 90 nm CMOS technology. It transfers 128 bit words between stacked SRAMs in an ARM-based System on Chip (SoC) platform at 250 MHz. This interface requires 0.05 mm2 of occupation area and achieves a 32 Gbit/sec of throughput and an average energy consumption of 35 muW/Gbit/sec.
Keywords
CMOS memory circuits; SRAM chips; VHF circuits; system-on-chip; AC-coupled 3D memory interface; ARM-based SoC; CMOS technology; bit rate 32 Gbit/s; chip-to-chip communication; frequency 250 MHz; power 1.12 mW; size 90 nm; stacked SRAM; system-on-chip; word length 128 bit; Aggregates; CMOS technology; Circuits; Clocks; Costs; Energy consumption; Protocols; System-on-a-chip; Throughput; Transmitters;
fLanguage
English
Publisher
ieee
Conference_Titel
Custom Integrated Circuits Conference, 2009. CICC '09. IEEE
Conference_Location
San Jose, CA
Print_ISBN
978-1-4244-4071-9
Electronic_ISBN
978-1-4244-4073-3
Type
conf
DOI
10.1109/CICC.2009.5280782
Filename
5280782
Link To Document