A 10b 50MS/s opamp-sharing pipeline A/D with current-reuse OTAs

A 10 b opamp-sharing pipeline A/D using current-reuse OTAs is presented. The current-reuse OTA, with two NMOS differential inputs operating in opposite phases, facilitates opamp-sharing between consecutive stages, minimizing power consumption. Constant transistor biasing ensures no loss of settling time from power-on delays. The A/D is fabricated in a 0.18 mum CMOS process and occupies active area of 0.7 mm². At 50 MS/s, maximum SNDR of 58 dB (ENOB = 9.3 b) is obtained with 9.2 mW analog power consumption on a 1.8 V supply.