Fast 3-D impedance extraction of VLSI interconnects based on the K element

In integrated circuits with frequency above several GHz, the parasitic inductive effect greatly influences the circuit performance, therefore requiring an efficient algorithm for extraction of frequency-dependent inductance and resistance. Based on the good localization property of the K element (inverse of the partial inductance method), a fast algorithm for interconnect inductance and resistance extraction is proposed in this paper. With an efficient window selection technique, filament partitioning, and two improvements in calculating filament inductance and inverting the global admittance matrix, complex structures of multilayered interconnects can be handled very well. While preserving good accuracy, the presented method exhibits about 100x speed-up over the FastHenry for some actual examples.