DocumentCode
1704865
Title
Design and characterization of input and output (I/O) pads
Author
Yusoff, Yuzman ; Zoolfakar, Ahmad Sabirin ; Aman, Shahrul ; Ahmad, Mohd Rais
Author_Institution
MIMOS BERHAD, Kuala Lumpur, Malaysia
fYear
2004
Abstract
The design of reliable input and output (I/O) pads require thorough understanding of process technology, especially for electrostatic discharge (ESD) and latch up protection. This paper describes the design methodology and characterization of I/O pads. This methodology includes SPICE simulation, layout drawing and silicon characterization. The I/O pads have been experimentally evaluated under test devices fabricated using MIMOS´s 3.3V 0.35μm CMOS process technology. The comparison between the measured performance and simulation is presented in this paper.
Keywords
CMOS integrated circuits; SPICE; circuit simulation; integrated circuit layout; semiconductor process modelling; silicon; 0.35 micron; 3.3 V; CMOS process technology; ESD; I/O pads; SPICE simulation; Si; electrostatic discharge; input/output pads; latch up protection; Atherosclerosis; CMOS logic circuits; CMOS technology; Circuit simulation; Electrostatic discharge; Integrated circuit technology; Low voltage; MIMO; Protection; Silicon;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Electronics, 2004. ICSE 2004. IEEE International Conference on
Print_ISBN
0-7803-8658-2
Type
conf
DOI
10.1109/SMELEC.2004.1620941
Filename
1620941
Link To Document