Adaptive runtime management of heterogenous MPSoCs: Analysis, acceleration and silicon prototype

Author

Arnold, Oliver ; Fettweis, Gerhard

Author_Institution

Dept. of Mobile Commun. Syst., Tech. Univ. Dresden, Dresden, Germany

fYear

2014

fDate

28-29 Oct. 2014

Firstpage

1

Lastpage

4

Abstract

In this paper, a dedicated runtime management unit, called CoreManager, is presented. It controls a heterogeneous Multiprocessor System-on-Chip (MPSoC). Therefore, it dynamically schedules tasks on the available processing elements. Furthermore, it is responsible for memory as well as power management. The instruction set architecture of the CoreManager is extended to improve performance for dynamic data dependency checking, task scheduling, processing element (PE) allocation and data transfer management. A significant performance improvement can be shown for all components. Performance results are presented, analyzed and compared with RISC and ASIC based approaches. The integration of the CoreManager in the Tomahawk2 MPSoC silicon prototype is shown. Furthermore, area, timing and power consumption results are provided.

Keywords

dynamic scheduling; instruction sets; multiprocessor interconnection networks; system-on-chip; CoreManager; adaptive runtime management; data transfer management; dedicated runtime management unit; dynamic data dependency checking; heterogenous MPSoC; instruction set architecture; multiprocessor system on chip; power management; processing element allocation; task scheduling; Dynamic scheduling; Hardware; Memory management; Resource management; Runtime; Adaptive task scheduling; CoreManager; heterogenous MPSoCs; runtime management;

fLanguage

English

Publisher

ieee

Conference_Titel

System-on-Chip (SoC), 2014 International Symposium on

Conference_Location

Tampere

Type

conf

DOI

10.1109/ISSOC.2014.6972444

Filename

6972444