• DocumentCode
    1706859
  • Title

    A 20b clockless DAC with sub-ppm-linearity 7.5nV/vHz-noise and 0.05ppm/°C-stability

  • Author

    McLachlan, R.C. ; Gillespie, A. ; Coln, M.C.W. ; Chisholm, D. ; Lee, D.T.

  • Author_Institution
    Analog Devices, Edinburgh, UK
  • fYear
    2013
  • Firstpage
    278
  • Lastpage
    279
  • Abstract
    DACs without continuous clocking are often favored in applications such as medical imaging and scientific instrumentation. The DACs in these high-precision systems are commonly endpoint-calibrated. After this calibration, a non-ideal DAC contributes three main sources of error: noise, temperature drift, and INL. The segmented voltage-mode R-2R DAC is an attractive architecture for reducing the first two of these error sources. Resistor Johnson noise is fixed by the DAC´s code-independent output resistance, which is readily lowered by the combination of several parallel segments. The complete signal path can be built using opamps that have a minimal noise gain of unity. This architecture also benefits from inherently zero endpoint error, avoiding any gain or offset drift over temperature. However, this preferred architecture for noise and temperature drift suffers from several sources of INL including: resistor mismatch, voltage losses across CMOS switches, and the nonlinearity of each resistor.
  • Keywords
    CMOS analogue integrated circuits; calibration; circuit stability; digital-analogue conversion; electric resistance; integrated circuit noise; operational amplifiers; resistors; switches; thermal noise; CMOS switches; INL; clockless DAC; code-independent output resistance; endpoint-calibration; error sources; high-precision system; noise error; nonideal DAC; opamp; parallel segment; resistor Johnson noise; resistor mismatch; resistor nonlinearity; segmented voltage-mode R-2R DAC; signal path; stability; sub-ppm-linearity; temperature drift error; voltage loss; word length 20 bit; zero endpoint error; Calibration; Force; Immune system; Noise; Resistance; Resistors; Switches;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International
  • Conference_Location
    San Francisco, CA
  • ISSN
    0193-6530
  • Print_ISBN
    978-1-4673-4515-6
  • Type

    conf

  • DOI
    10.1109/ISSCC.2013.6487734
  • Filename
    6487734