• DocumentCode
    170699
  • Title

    Construction of GCCFG for inter-procedural optimizations in Software Managed Manycore (SMM) architectures

  • Author

    Holton, Bryce ; Bai, Ke ; Shrivastava, Ashish ; Ramaprasad, Harini

  • Author_Institution
    Arizona State Univ., Tempe, AZ, USA
  • fYear
    2014
  • fDate
    12-17 Oct. 2014
  • Firstpage
    1
  • Lastpage
    10
  • Abstract
    Software Managed Manycore (SMM) architectures - in which each core has only a scratch pad memory (instead of caches), - are a promising solution for scaling memory hierarchy to hundreds of cores. However, in these architectures, the code and data of the tasks mapped to the cores must be explicitly managed in the software by the compiler. State-of-the-art compiler techniques for SMM architectures require inter-procedural information and analysis. A call graph of the program does not have enough information, and Global CFG, i.e., combining all the control flow graphs of the program has too much information, and becomes too big. As a result, most new techniques have informally defined and used GCCFG (Global Call Control Flow Graph) - a whole program representation which captures the control-flow as well as function call information in a succinct way - to perform inter-procedural analysis. However, how to construct it has not been shown yet. We find that for several simple call and control flow graphs, constructing GCCFG is relatively straightforward, but there are several cases in common applications where unique graph transformation is needed in order to formally and correctly construct the GCCFG. This paper fills this gap, and develops graph transformations to allow the construction of GCCFG in (almost) all cases. Our experiments show that by using succinct representation (GCCFG) rather than elaborate representation (GlobaICFG) the compilation time of state-of-the-art code management technique [4] can be improved by an average of 5X, and that of stack management [20] can be improved by an average of 4X.
  • Keywords
    flow graphs; memory architecture; multiprocessing systems; optimisation; GCCFG; Global Call Control Flow Graph; SMM architectures; call graph; compiler techniques; interprocedural optimizations; memory hierarchy scaling; scratch pad memory; software managed manycore architectures; Abstracts; Computer architecture; Data mining; Flow graphs; Optimization; Program processors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Compilers, Architecture and Synthesis for Embedded Systems (CASES), 2014 International Conference on
  • Conference_Location
    Jaypee Greens
  • Type

    conf

  • DOI
    10.1145/2656106.2656122
  • Filename
    6972471