A 1/4-inch 8Mpixel back-illuminated stacked CMOS image sensor

Author

Sukegawa, S. ; Umebayashi, T. ; Nakajima, T. ; Kawanobe, H. ; Koseki, K. ; Hirota, I. ; Haruta, T. ; Kasai, Makoto ; Fukumoto, K. ; Wakano, T. ; Inoue, Ken ; Takahashi, Hiroki ; Nagano, Takeshi ; Nitta, Yoshinori ; Hirayama, Takatsugu ; Fukushima, Norishi

Author_Institution

Sony, Atsugi, Japan

fYear

2013

Firstpage

484

Lastpage

485

Abstract

In recent years, cellphone cameras have come to require much more diversification and increased functionalities, due to the strong growth of the smartphone market. In addition to the image quality, speed, and pixel counts that conventional image sensors require, there is high demand for new functions that can respond to various photo-taking scenes. We developed a stacked CMOS image sensor (CIS), composed of conventional back-illuminated (BI) image-sensor technology and 65nm standard logic technology.

Keywords

CMOS image sensors; CMOS logic circuits; mobile handsets; 1-4-inch 8Mpixel back-illuminated stacked CMOS image sensor; BI image-sensor technology; CIS; cellphone cameras; diversification; image quality; photo-taking scenes; pixel count; size 65 nm; smartphone market; speed count; standard logic technology; Bismuth; CMOS image sensors; Image quality; Motion pictures; Noise; Through-silicon vias; Transistors;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference Digest of Technical Papers (ISSCC), 2013 IEEE International

Conference_Location

San Francisco, CA

ISSN

0193-6530

Print_ISBN

978-1-4673-4515-6

Type

conf

DOI

10.1109/ISSCC.2013.6487825

Filename

6487825