A 100-Gbps low-power PRBS generator based on a half-rate-clock architecture using InP HBTs

Author

Bouvier, Y. ; Nagatani, Munehiko ; Nosaka, Hideyuki ; Kurishima, Kenji ; Kashio, Norihide ; Ida, Minoru ; Murata, Kentaro

Author_Institution

NTT Photonics Labs., NTT Corp., Atsugi, Japan

fYear

2014

fDate

1-6 June 2014

Firstpage

1

Lastpage

3

Abstract

A new architecture using a half-rate clock for pseudo-random-bit-sequence (PRBS) generator has been devised for high-speed and low-power operation. For proof of concept, a 2⁷-1 PRBS generator IC was designed and fabricated with 290-GHz-f_T InP HBT technology. The PRBS generator operates up to 100 Gbps with a low power consumption of 955 mW, leading to a record figure-of-merit of 1.42 mW·Gbps^-1. This circuit can provide a clear waveform with a very low RMS jitter of less than 500 fs in the whole operation range.

Keywords

heterojunction bipolar transistors; indium compounds; low-power electronics; millimetre wave integrated circuits; random number generation; HBT technology; InP; PRBS generator IC; bit rate 100 Gbit/s; figure-of-merit; frequency 290 GHz; half-rate-clock architecture; high-speed operation; low-power operation; power 955 mW; Heterojunction bipolar transistors; Integrated circuit interconnections; Multiplexing; Optical polarization; Optical sensors; Photonics; Stimulated emission; Half-rate clock; High speed; InP HBT; Low power; PRBS Generator;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium (IMS), 2014 IEEE MTT-S International

Conference_Location

Tampa, FL

Type

conf

DOI

10.1109/MWSYM.2014.6848419

Filename

6848419