DocumentCode

1713289

Title

Development of a 4-layer low cost flip chip packaging technology

Author

Govind, Anand ; Ghahghahi, Farshad

Author_Institution

LSI Logic Corp.

fYear

2003

Firstpage

567

Lastpage

571

Keywords

Bonding; Costs; Dielectric substrates; Flip chip; Large scale integration; Packaging; Qualifications; Routing; Silicon; Wire;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2003. Proceedings. 53rd

ISSN

0569-5503

Print_ISBN

0-7803-7791-5

Type

conf

DOI

10.1109/ECTC.2003.1216337

Filename

1216337