DocumentCode
1714014
Title
Analysis of noise suppression techniques using embedded capacitor on split power bus in multi-layer package
Author
Jeong, Youchul ; Kim, Joungho ; Lu, Albert Chee W ; Wai, Lai L. ; Fan, Wei ; Lok, Boon K. ; Wong, Chee K.
Author_Institution
Terahertz Interconnection & Package Lab., Korea Adv. Inst. of Sci. & Technol., Daejon, South Korea
Volume
1
fYear
2004
Firstpage
215
Abstract
An embedded capacitor for noise suppression on a power bus is analyzed and compared with a discrete capacitor by full wave simulation from 40 MHz to 5 GHz. In this paper, the design methodology of the power bus is demonstrated by analyzing self and transfer impedance characteristic of the embedded capacitor.
Keywords
capacitors; electric impedance; electromagnetic interference; interference suppression; printed circuit design; 40 MHz to 5 GHz; embedded capacitor; full wave simulation; multi-layer package; noise suppression; self impedance; split power bus; transfer impedance; Capacitance; Electromagnetic interference; Frequency; High K dielectric materials; High-K gate dielectrics; Inductance; Noise reduction; Packaging; Power capacitors; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility, 2004. EMC 2004. 2004 InternationalSymposium on
Print_ISBN
0-7803-8443-1
Type
conf
DOI
10.1109/ISEMC.2004.1350028
Filename
1350028
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