DocumentCode
1715347
Title
On probabilistic testing of large-scale sequential circuits using circuit decomposition
Author
Das, Sunil R. ; Jone, Wen-Ben ; Nayak, Amiya R. ; Choi, Ian
Author_Institution
Dept. of Electr. Eng., Ottawa Univ., Ont., Canada
fYear
1994
Firstpage
311
Lastpage
314
Abstract
In this paper the detection of permanent faults in sequential circuits by random testing is analyzed utilizing the circuit partitioning approach together with a continuous parameter Markov model. Given a large sequential circuit, it is partitioned into several smaller partitions using either series or parallel decomposition. For each partition with certain stuck faults specified, the original state table and its error version are derived from an analysis of the partition under fault-free and faulty conditions, respectively. A random testing strategy that uses a three-state Markov model is used for detecting permanent stuck faults. Experimentation on various sequential circuits has shown that a significant saving in testing or test generation time can be achieved if we can partition the circuit and then test each of its components as opposed to testing the circuit in its original form
Keywords
Markov processes; VLSI; fault location; integrated circuit testing; logic testing; probability; sequential circuits; circuit decomposition; circuit partitioning; continuous parameter Markov model; large-scale sequential circuits; original state table; parallel decomposition; permanent fault; probabilistic testing; random testing; series decomposition; three-state Markov model; Circuit faults; Circuit testing; Computer science; Digital circuits; Electrical fault detection; Fault detection; Integrated circuit interconnections; Large-scale systems; Sequential analysis; Sequential circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 1994., Proceedings of the Seventh International Conference on
Conference_Location
Calcutta
ISSN
1063-9667
Print_ISBN
0-8186-4990-9
Type
conf
DOI
10.1109/ICVD.1994.282709
Filename
282709
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