DocumentCode
1718394
Title
Delamination modeling for IC package with multiple initial cracks
Author
Yong Liu ; Irving, S. ; Rioux, Marc
Author_Institution
Fairchild Semiconductor Corp.
fYear
2003
Firstpage
1772
Lastpage
1776
Abstract
Package delamination is a critical reliability problem which may cause thermal management and electrical problems. In this paper, package delamination with multiple initial crack for SOIC package is simulated and analyzed by FEA. The strain energy release rate (delamination driving force G), CTE stresses and effects of moisture vapor pressure (acting on the crack surface) are studied. Major investigations include: (1) the impact of multiple crack delamination versus one single crack delamination. Typical examples are how the multiple cracks, which locate at the same interface and/or appear simultaneously at the interfaces of die surface with EMC, die attach with pad, pad with EMC, will interact each other and delaminate the package. (2) Impact of moisture vapor pressure after moisture diffusion at 85C/85%RH, will he studied for the multiple crack delamination. Through this study, a better understandmg of SOIC package delamination may be obtained.
Keywords
Delamination; Electromagnetic compatibility; Electronic components; Integrated circuit modeling; Integrated circuit packaging; Microassembly; Shearing; Stress; Surface cracks; Temperature;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2003. Proceedings. 53rd
Conference_Location
New Orleans, Louisiana, USA
ISSN
0569-5503
Print_ISBN
0-7803-7791-5
Type
conf
DOI
10.1109/ECTC.2003.1216542
Filename
1216542
Link To Document