Effect of higher-order PSDs on timing jitter

This paper describes the effect of higher-order PSDs at a squarer output on the jitter variance at a timing circuit output. The timing circuit consists of a squarer, a pre-filter, and a PLL arranged in tandem. The transmission schemes are assumed to be PAM, ASK and QAM. Additive white Gaussian noise exists at the receive filter input. The band-limiting scheme is assumed to be of a cosine roll-off. The higher-order PSDs are components of the jitter source PSD at the squarer output. Theoretical calculations show that the SS and SN components of the jitter source PSD can be represented by 0th- and ±2nd-order PSDs. However, based on numerical calculations, the SN component consists of only the 0th-order PSD. This may be due to the effect of the band-limiting scheme assumed herein. The results hold for all of the transmission schemes, SNRs, alphabet sizes, and roll-off factors treated in this paper.