DocumentCode
1723388
Title
Boolean Formalisation of the PMC Model for Faulty Units Diagnosis in Regular Multi-Processor Systems
Author
Manik, M. ; Gramatová, E.
Author_Institution
Inst. of Inf., Slovak Acad. of Sci., Bratislava
fYear
2008
Firstpage
1
Lastpage
2
Abstract
The article describes the basic principles of a system diagnosis in multi-processor systems. Specifically, it attends the diagnosis of t-diagnosable systems using PMC diagnosis model. The article closely describes the Boolean formalisation extending the PMC model and its insufficiencies. It defines new possibilities of using this formalisation in systems with a regular structure.
Keywords
Boolean algebra; multiprocessing systems; Boolean formalisation; PMC model; faulty units diagnosis; multiprocessor systems; system diagnosis; Fault diagnosis; Gain; Informatics; Logic testing; System testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits and Systems, 2008. DDECS 2008. 11th IEEE Workshop on
Conference_Location
Bratislava
Print_ISBN
978-1-4244-2276-0
Electronic_ISBN
978-1-4244-2277-7
Type
conf
DOI
10.1109/DDECS.2008.4538773
Filename
4538773
Link To Document