High-mobility Si1−xGex-channel PFETs: Layout dependence and enhanced scalability, demonstrating 90% performance boost at narrow widths

This paper is the first to provide a comprehensive study on the layout dependence of scaled Si_1-xGe_x-channel pFETs. Drive current enhancement up to 90% is demonstrated for Si_0.55Ge_0.45-channel pFETs with L_G = 35 nm and EOT = 0.9 nm when the transistor width (W) is scaled from 10 μm to 110 nm. This is attributed to a change in channel stress from biaxial compressive at large W to the more beneficial longitudinal uniaxial compressive stress at narrow W. These results are confirmed by both Nano-Beam Diffraction and TCAD analysis. Moreover, L_G = 35 nm Si_0.55Ge_0.45 pFETs show 20% linear current enhancement for Length-Of-Diffusion (LOD) scaling below 200 nm. Both W- and LOD-scaling work favorably for Si_1-xGe_x pFETs, as a consequence they are excellent candidates to be used in future HP CMOS technologies.