Electromigration study of micro bumps at Si/Si interface in 3DIC package for 28nm technology and beyond

This paper is a study of the electromigration (EM) effects of micro bumps at silicon-silicon interface in 3DIC package for 28nm technology and beyond. Two joint schemes were designed and fabricated: one of the schemes was the joining of Sn-capped Cu post to ENEPIG (Electroless-Nickel-Electroless-Palladium-Immersion-Gold) UBM (Under-Bump-Metallurgy) pad on silicon substrate; the other scheme was the joining of top Cu post to bottom Cu post that formed a symmetrical joint structure. In-situ resistance was monitored to study the situation of joint degradation. During the test, a progressive resistance change was observed, which differed from the test data of conventional C4 (Controlled Collapse Chip Connections) bumps under regular test condition. (The detail will be described in this paper.) The experimental results showed that the rapid resistance shifts of both micro bump schemes were due to the high current density and the fast Cu-Sn IMC (Inter Metallic Compound) formation.