DocumentCode
1731693
Title
Roadblocks and critical aspect of cleaning for sub-65nm technologies
Author
Mertens, Paul W.
Author_Institution
Imec, Leuven, Belgium
fYear
2005
Firstpage
95
Lastpage
96
Abstract
This study reviews some of the critical aspects of cleaning for sub-65 nm technologies. These issues include: removal of small particles, removal of metallic contamination, high k surface preparation and rinsing and drying.
Keywords
drying; semiconductor technology; surface cleaning; surface contamination; high k surface drying; high k surface preparation; high k surface rinsing; metallic contamination removal; small particles removal; sub-65nm technology; Chemical technology; Cleaning; Frequency; High K dielectric materials; High-K gate dielectrics; Rough surfaces; Semiconductor device manufacture; Substrates; Surface contamination; Surface roughness;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, 2005. (VLSI-TSA-Tech). 2005 IEEE VLSI-TSA International Symposium on
ISSN
1930-8868
Print_ISBN
0-7803-9058-X
Type
conf
DOI
10.1109/VTSA.2005.1497092
Filename
1497092
Link To Document