Verifying equivalence of digital signal processing circuits

Verifying the equivalence of digital signal processing circuits is not only important in designing architectures, but also in designing secure circuits. If the functionality equivalence cannot be easily verified, then the security can be improved. In this paper, we present novel use of high-level transformations to hide the functionalities of DSP circuits, which include retiming, pipelining, folding, unfolding, and interleaving. We show that we can design circuits which are harder to reverse engineer by adopting high-level transformations. However, other techniques, such as modifying the switch instances, adding dummy loops, and manipulating inputs, can also be exploited for both verifying equivalence as well as designing secure circuits.