DocumentCode
1733259
Title
Tolerance analysis for electronic circuit design using the method of moments
Author
Sun, Wei ; Chen, Richard M M ; Jiang, Yao-Lin
Author_Institution
Sch. of Creative Media, City Univ. of Hong Kong, China
Volume
1
fYear
2002
fDate
6/24/1905 12:00:00 AM
Abstract
In this paper, we propose a mathematical model for the tolerance analysis in circuit design. Using a second-order Taylor series approximation, a more accurate set of formulae is derived for the method of moments, which employ mapping functions to transform parameter tolerance into response tolerance. A numerical example for the application of the new formulae in circuit tolerance design is presented to show the good accuracy of the new formulae.
Keywords
method of moments; network synthesis; series (mathematics); tolerance analysis; Taylor series; electronic circuit design; mathematical model; method of moments; tolerance analysis; Circuit simulation; Circuit synthesis; Circuit testing; Design methodology; Electronic circuits; Moment methods; Production; Sampling methods; Taylor series; Tolerance analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN
0-7803-7448-7
Type
conf
DOI
10.1109/ISCAS.2002.1009903
Filename
1009903
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