The Invariance of the Noise Impedance in n-MOSFETs across Technology Nodes and its Application to the Algorithmic Design of Tuned Low Noise Amplifiers

Author

Yau, K.H.K. ; Tang, K.K.W. ; Schvan, P. ; Chevalier, P. ; Sautreuil, B. ; Voinigescu, S.P.

Author_Institution

Edward S. Rogers Sr. Dept. of Electr. of Comput. Eng., Toronto Univ., Ont.

fYear

2007

Firstpage

245

Lastpage

248

Abstract

The measured noise impedance of MOSFETs is found to be invariant across technology nodes. Together with the invariance of the optimum noise figure current density, J_OPT, this allows for optimally noise matched LNAs to be ported without redesign between technology nodes and for a given design to be scaled in frequency. The design porting and frequency scaling are validated experimentally on record low noise LNAs fabricated in 90 nm and 130 nm CMOS technology

Keywords

CMOS analogue integrated circuits; MOSFET; analogue integrated circuits; low noise amplifiers; nanotechnology; 130 nm; 90 nm; CMOS technology; algorithmic design; design porting; design scaling; frequency scaling; n-MOSFET; noise impedance; noise parameters; optimum noise figure current density; optimum source impedance; tuned low-noise amplifiers; Algorithm design and analysis; CMOS technology; Current density; Frequency; Impedance measurement; Low-noise amplifiers; MOSFET circuits; Noise figure; Noise measurement; Optimized production technology; Noise parameters; algorithmic design; design scaling and porting; optimum source impedance; tuned low-noise amplifiers;

fLanguage

English

Publisher

ieee

Conference_Titel

Silicon Monolithic Integrated Circuits in RF Systems, 2007 Topical Meeting on

Conference_Location

Long Beach, CA

Print_ISBN

0-7803-9765-7

Electronic_ISBN

0-7803-9765-7

Type

conf

DOI

10.1109/SMIC.2007.322830

Filename

4117371