• DocumentCode
    1737194
  • Title

    A universal simulation model for SONET/SDH synchronization networks

  • Author

    Antonova, G.S. ; Schezovanov, L.N. ; Vuong, S.T.

  • Author_Institution
    St. Petersburg State Univ. of Telecommun., Russia
  • fYear
    1996
  • Firstpage
    10
  • Lastpage
    13
  • Abstract
    In this paper, we propose and discuss a universal digital simulation model for synchronization networks, which can be applied to SONET/SDH networks of arbitrary structures. This model is derived from the models of the slave clock and of the synchronization link, which take into consideration all important impairments such as jitter, wander, frequency offset, phase hop, as well as phase and clock noises. Preliminary simulation results are also discussed
  • Keywords
    SONET; jitter; noise; phase locked loops; phase noise; synchronisation; synchronous digital hierarchy; telecommunication networks; SDH; SONET; clock noises; frequency offset; jitter; phase hop; phase noises; slave clock; synchronization networks; universal digital simulation model; universal simulation model; wander; Clocks; Detectors; Digital simulation; Equations; Filters; Frequency synchronization; Jitter; Oscillators; Phase detection; Phase locked loops; Phase noise; SONET; Synchronization; Synchronous digital hierarchy;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Emerging Technologies and Applications in Communications, 1996. Proceedings., First Annual Conference on
  • Conference_Location
    Portland, OR
  • Print_ISBN
    0-8186-7585-3
  • Type

    conf

  • DOI
    10.1109/ETACOM.1996.502467
  • Filename
    502467