Effect of non-linear settling error on the harmonic distortion of fully-differential switched-current bandpass ΣΔ modulators

Author

De La Rosa, Josá M. ; Pérez-Verdú, Belán ; Medeiro, Fernando ; Río, Rocío Del ; Rodríguez-Vázquez, Angel

Author_Institution

CNM-CSIC, Sevilla, Spain

Volume

1

fYear

2001

fDate

6-9 May 2001

Firstpage

340

Abstract

This paper presents a detailed study of the effect of the non-linear settling on the harmonic distortion of Bandpass ΣΔ Modulators (BP-ΣΔMs) realized using Fully Differential (FD) Switched-current (SI) circuits. Based on the analysis of building blocks, closed-form expressions are derived for the third-order intermodulation distortion of BP-ΣΔMs due to defective settling, on the one hand, and to the non-linearities of the sampling process, on the other. Time-domain simulations and measurements taken from a 0.8 μm CMOS 4th-order BP-ΣΔM silicon prototype validate our approach

Keywords

CMOS integrated circuits; elemental semiconductors; harmonic distortion; intermodulation distortion; modulators; nonlinear network analysis; sigma-delta modulation; signal sampling; silicon; switched current circuits; time-domain analysis; 0.8 μm CMOS; 0.8 mum; 4th-order Si prototype; Si; bandpass sigma delta modulators; differential switched-current bandpass modulators; harmonic distortion; nonlinear settling error; nonlinearities; sampling process; third-order intermodulation distortion; time-domain simulation; Circuit simulation; Closed-form solution; Distortion measurement; Harmonic distortion; Intermodulation distortion; Sampling methods; Silicon; Switching circuits; Time domain analysis; Virtual prototyping;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.921862

Filename

921862