CARIOCA-0.25 μm CMOS fast binary front-end for sensor interface using a novel current-mode feedback technique

Author

Moraes, D. ; Anghinolfi, F. ; Deval, P. ; Jarron, P. ; Riegler, W. ; Rivettí, A. ; Schmidt, B.

Author_Institution

Univ. Federal do Rio de Janeiro, Brazil

Volume

1

fYear

2001

fDate

6-9 May 2001

Firstpage

360

Abstract

We report on a very fast and low noise front-end, implemented in 0.25 μm CMOS technology. The CARIOCA amplifier discriminator chip has input impedance of 10 Ω, in order to be compatible with sensors of large capacitance, and a peaking time of 14 ns. The conversion gain of 8 mV/fC remains almost unchanged up to a detector capacitance of 120 pF. A noise figure of 450e^- at zero input capacitance with a noise slope of 37.4e^-/pF, at a 2.5 V power supply, was measured

Keywords

CMOS analogue integrated circuits; current-mode circuits; detector circuits; discriminators; feedback amplifiers; low-power electronics; 0.25 micron; 2.5 V; CARIOCA; CMOS binary front-end circuit; amplifier discriminator chip; capacitance; conversion gain; current-mode feedback; input impedance; noise figure; peaking time; sensor interface; Capacitance; Driver circuits; Equations; Feedback loop; Frequency; Mirrors; Preamplifiers; Pulse measurements; Transconductance; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.921867

Filename

921867