110 MHz IF-baseband CMOS receiver for J-CDMA/AMPS application

Author

Miyashita, Kiyoshi ; Ichikawa, Susumu ; Nakao, Yoshihiro ; Shimataka, Naoto ; Otuki, Takuji

Author_Institution

Asahi-Kasei Microsyst. Co. Ltd., Kanagawa, Japan

Volume

4

fYear

2001

fDate

6-9 May 2001

Firstpage

690

Abstract

This paper describes a full CMOS Japanese-CDMA/AMPS dual mode intermediatefrequency (IF)-baseband receiver developed in a mature 0.6 μm double-poly triple-metal technology. IF automatic gain control (AGC) block has over 90 dB dynamic range with no attenuator or source degeneration resistor required. Provided with such architecture, this receiver displayed both high linearity and low noise performance. An overall maximum gain of more than 90 dB and the noise figure were 10 dB. Third-order input intercept point (IIP3) was 11 dBm with respect to 500 ohm. This super high IIP3 receiver consumes only 24 mA for CDMA mode and 18 mA for AMPS mode. Standby current is less than 1 uA

Keywords

CMOS analogue integrated circuits; automatic gain control; cellular radio; code division multiple access; integrated circuit noise; large scale integration; 0.6 micron; 10 dB; 110 MHz; 18 mA; 24 mA; 90 dB; IF-baseband CMOS receiver; J-CDMA/AMPS application; automatic gain control; double-poly triple-metal technology; linearity; low noise performance; standby current; third-order input intercept point; Equations; Filters; Impedance; Intrusion detection; Linearity; MOSFETs; Multiaccess communication; Performance gain; Topology; Transconductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2001. ISCAS 2001. The 2001 IEEE International Symposium on

Conference_Location

Sydney, NSW

Print_ISBN

0-7803-6685-9

Type

conf

DOI

10.1109/ISCAS.2001.922331

Filename

922331