• DocumentCode
    1747895
  • Title

    Circuit-based Boolean reasoning

  • Author

    Kuehlmann, Andreas ; Ganai, Malay K. ; Paruthi, Viresh

  • Author_Institution
    Cadence Berkeley Labs., CA, USA
  • fYear
    2001
  • fDate
    2001
  • Firstpage
    232
  • Lastpage
    237
  • Abstract
    Many tasks in CAD, such as equivalence checking, property checking, logic synthesis, and false paths analysis require efficient Boolean reasoning for problems derived from circuit structures. Traditionally, canonical representations, e.g., BDDs, or SAT-based search methods are used to solve a particular class of problems. In this paper we present a combination of techniques for Boolean reasoning based on BDDs, structural transformations, and a SAT procedure natively working on a shared graph representation of the problem. The described intertwined integration of the three techniques results in a robust summation of their orthogonal strengths. Our experiments demonstrate the effectiveness of the approach.
  • Keywords
    Boolean functions; binary decision diagrams; inference mechanisms; logic CAD; redundancy; BDDs; CAD; canonical representations; circuit-based Boolean reasoning; equivalence checking; false paths analysis; intertwined integration; logic synthesis; orthogonal strengths; property checking; shared graph representation; structural transformations; Binary decision diagrams; Boolean functions; Circuit synthesis; Circuit testing; Data structures; Logic circuits; Logic design; Logic testing; Permission; Robustness;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2001. Proceedings
  • ISSN
    0738-100X
  • Print_ISBN
    1-58113-297-2
  • Type

    conf

  • DOI
    10.1109/DAC.2001.156141
  • Filename
    935510