Multiple parallel concatenated single parity check codes

In this paper, single parity check (SPC) codes are applied in a parallel concatenated structure to produce a high performance coding scheme with very low complexity. We show a simple yet elegant way of improving system performance at medium-low bit error rates (BER), without changing the overall code parameters (code rate, code block length). We compare its BER performance with other coding schemes. Multiple parallel concatenated SPC (M-PC-SPC) codes are capable of outperforming not only the best 64-state convolutional coding schemes, but also the 16-state turbo codes. For bit interleaved coded modulation (BICM) schemes, the 4 parallel concatenated SPC code is about 10 times less complex than the 16-state turbo codes, and yet with only 5 iterations, it still performs better than the turbo code iterated 6 times in the fading and AWGN channel. Combined with multilevel modulation schemes, this high performance scheme is very suitable for practical systems due to its flexible code parameters, and low complexity