• DocumentCode
    1758505
  • Title

    Electron-Hole Bilayer TFET: Experiments and Comments

  • Author

    Revelant, A. ; Villalon, A. ; Yan Wu ; Zaslavsky, A. ; Le Royer, Cyrille ; Iwai, Hisato ; Cristoloveanu, S.

  • Author_Institution
    Dipt. di Ing. ElettricaGestionale e Meccanica, Univ. degli Studi di Udine, Udine, Italy
  • Volume
    61
  • Issue
    8
  • fYear
    2014
  • fDate
    Aug. 2014
  • Firstpage
    2674
  • Lastpage
    2681
  • Abstract
    We investigate Si/Si0.85Ge0.15 fully depleted-SOI tunnel FET (TFET) devices operated in the electron-hole bilayer (EHB) mode. The application of negative bias on front gate and positive bias on back gate results in confined hole and electron layers that are expected to enable vertical band-to-band tunneling (BTBT). The idea of the EHB-TFET device is to enhance the tunneling current by expanding the BTBT generation area from the narrow lateral source/channel junction to the entire channel region. Our systematic measurements on a variety of TFETs with variable geometry and channel materials do not offer support to this attractive concept. Self-consistent simulations confirm that the vertical BTBT transitions do not produce an appreciable current in our devices, due to size-and bias-induced quantization, effective mass anisotropy, and incomplete formation of the bilayer. We examine the conditions for efficient vertical BTBT to occur and show that they cannot be met simultaneously, at least in Si or Si/SiGe devices.
  • Keywords
    field effect transistors; silicon-on-insulator; BTBT generation area; EHB mode; EHB-TFET device; Si-Si0.85Ge0.15; TFET variety; back gate; bias-induced quantization; bilayer formation; channel material; confined hole-electron layers; effective mass anisotropy; electron-hole bilayer TFET; electron-hole bilayer mode; front gate; fully depleted-SOI TFET device; fully-depleted-SOI tunnel FET device; narrow lateral source-channel junction; negative bias; positive bias; self-consistent simulation; size-induced quantization; tunneling current; variable geometry; vertical BTBT; vertical BTBT transition; vertical band-to-band tunneling; Charge carrier processes; Current measurement; Logic gates; Quantization (signal); Silicon; Silicon germanium; Tunneling; Characterization; SOI; electron hole bilayer TFET; quantum confinement; sub-band alignment; sub-band splitting; supercoupling; tunnel-FET; tunnel-FET.;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2014.2329551
  • Filename
    6855339