DocumentCode
1760233
Title
Improving Throughput of Power-Constrained Many-Core Processors Based on Unreliable Devices
Author
Hao Wang ; Nam Sung Kim
Author_Institution
Univ. of Wisconsin-Madison, Madison, WI, USA
Volume
33
Issue
4
fYear
2013
fDate
July-Aug. 2013
Firstpage
16
Lastpage
24
Abstract
Using slightly less device-level redundancy than is necessary to make all processor cores defect free actually makes cores smaller, faster, and more power efficient. Under the same power and yield constraints, a carbon nanotube processor with less device-level redundancy can provide 1.75x higher throughput, while also being nearly 2x smaller than a similar processor that has more device-level redundancy and makes all cores defect free.
Keywords
carbon nanotubes; microprocessor chips; redundancy; carbon nanotube processor; device-level redundancy; power-constrained many-core processors; unreliable devices; yield constraints; CMOS integrated circuits; Carbon nanotubes; Inverters; Multicore processing; Power system reliability; Program processors; Redundancy; System-on-chip; carbon nanotube; many-core processor; power constraint; reliability;
fLanguage
English
Journal_Title
Micro, IEEE
Publisher
ieee
ISSN
0272-1732
Type
jour
DOI
10.1109/MM.2013.69
Filename
6527885
Link To Document