• DocumentCode
    1762973
  • Title

    Elimination of Gate Leakage in GaN FETs by Placing Oxide Spacers on the Mesa Sidewalls

  • Author

    Peng Liu ; Chuncheng Xie ; Feng Zhang ; Jianguo Chen ; Dongmin Chen

  • Author_Institution
    Sch. of Innovation & Entrepreneurship, Peking Univ., Beijing, China
  • Volume
    34
  • Issue
    10
  • fYear
    2013
  • fDate
    Oct. 2013
  • Firstpage
    1232
  • Lastpage
    1234
  • Abstract
    This letter reports the fabrication of a GaN heterostructure field-effect transistor with oxide spacer placed on the mesa sidewalls. The presence of an oxide spacer effectively eliminates the gate leakage current that occurs at the channel edge, where the gate metal is in contact with the 2-D electron gas edge on the mesa sidewall. From the two-terminal gate leakage current measurements, the leakage current was found to be several nA at VG=-12 V and at VG=-450 V. The benefits of the proposed spacer scheme include the patterning of the metal electrodes by plasma etching and a lower manufacturing cost.
  • Keywords
    III-V semiconductors; electrodes; electron gas; gallium compounds; high electron mobility transistors; leakage currents; microfabrication; sputter etching; wide band gap semiconductors; 2D electron gas edge; FET; GaN; channel edge; gate leakage current elimination; gate metal; heterostructure field-effect transistor; manufacturing cost; mesa sidewalls; metal electrodes patterning; oxide spacer; plasma etching; spacer scheme; two-terminal gate leakage current measurements; voltage -450 V; voltage 12 V; Etching; Gallium nitride; Gate leakage; HEMTs; Logic gates; MODFETs; CMOS compatible process; GaN; gate dielectric; gate leakage; heterostructure field-effect transistor (HFET); mesa isolation; spacers;
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2013.2278013
  • Filename
    6587083