DocumentCode
1763248
Title
Synergistic Reliability and Yield Enhancement Techniques for Embedded SRAMs
Author
Lu, Shyue-Kung ; Huang, Huan-Hua ; Huang, Jiun-Lang ; Ning, Pony
Author_Institution
Dept. of Electr. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei, Taiwan
Volume
32
Issue
1
fYear
2013
fDate
Jan. 2013
Firstpage
165
Lastpage
169
Abstract
Single isolated fault (SIF) stands for about 60%-70% of the total number of defects and is rather redundancy hungry since a spare row or a column is required for repairing each SIF. Therefore, manufacturing yield will decrease if we do not allocate sufficient spare resources. In this paper, instead of the traditional fault replacement techniques, synergistic techniques that integrate both fault replacement and fault masking techniques are proposed. With our approaches, SIFs are masked instead of the traditional replacement for repairing. For other minor fault types (e.g., faulty rows and faulty columns), the fault replacement technique is used as usual. According to simulation results, repair rates can be improved significantly. The proposed techniques can be integrated with the conventional built-in self-repair with nearly negligible hardware overhead.
Keywords
SRAM chips; embedded systems; fault diagnosis; reliability; SIF; embedded SRAM; fault replacement; single isolated fault; synergistic reliability; yield enhancement; Arrays; Built-in self-test; Circuit faults; Hardware; Maintenance engineering; Redundancy; Embedded memory; reliability; repair; yield;
fLanguage
English
Journal_Title
Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Publisher
ieee
ISSN
0278-0070
Type
jour
DOI
10.1109/TCAD.2012.2210420
Filename
6387702
Link To Document