DocumentCode
1768342
Title
Feasible region assignment of routing nets in single-layer routing
Author
Jin-Tai Yan ; Yu-Jen Tseng ; Chia-Heng Yen
Author_Institution
Dept. of Comput. Sci. & Inf. Eng., Chung-Hua Univ., Hsinchu, Taiwan
fYear
2014
fDate
1-5 June 2014
Firstpage
393
Lastpage
396
Abstract
It is well known that single-layer routing is used for RDL routing in flip-chip designs and substrate routing in package designs. In this paper, given a set of two-terminal nets in a single-layer gridded routing plane, the routing regions of all the given nets can be initially constructed. Based on the routing constraints on different intersection conditions of two routing regions in a single layer, the wiring directions of the given nets can be further assigned. Finally, based on the assigned directions of the given nets, the wiring paths of the given nets onto the routing grids can be assigned by diffusing the overlapping paths and eliminating the unnecessary detours in single-layer routing. The experimental results show that our proposed approach can route 99.98% of the given nets in single-layer routing for 6 tested examples in reasonable CPU time on the average.
Keywords
flip-chip devices; network routing; CPU time; RDL routing; flip-chip designs; intersection condition; overlapping path; package designs; routing constraint; routing grid; routing nets; routing region; single-layer gridded routing plane; substrate routing; two-terminal nets; wiring direction; wiring path; Design automation; Flip-chip devices; Integrated circuits; Routing; Shape; Substrates; Wiring;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2014 IEEE International Symposium on
Conference_Location
Melbourne VIC
Print_ISBN
978-1-4799-3431-7
Type
conf
DOI
10.1109/ISCAS.2014.6865148
Filename
6865148
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