Design of a 6∼15GHz folded mixer in 0.13um CMOS technology

Author

Lin Shengmeng ; Zhuang Xiaobo

Author_Institution

NO.36 Res. Inst., CETC, Jiaxing, China

fYear

2014

fDate

26-29 July 2014

Firstpage

1324

Lastpage

1326

Abstract

The design and analysis of down-conversion mixer for high-band applications between 6-15GHz is presented in this paper. The mixer proposed is based on folded double-balanced Gilbert cell topology which is good for low-voltage use and well-balanced performances. Two on-chip inductors are introduced for biasing and reducing flicker noise. By setting the bias separately, both the LO stages and trans-conductance stages have difference current. The simulation in TSMC 0.13-μm process shows a conversion gain of 2.3-4.2dB, a noise figure of 12.9-15.5dB, and a third-order inter-modulation intercept point (ΠP3) of 5.1-6dBm between 6-15GHz. This mixer consumes 4.8mW under a 1.2-V supply, and the total area of the layout is 0.6 × 0.8mm².

Keywords

CMOS integrated circuits; inductors; microwave mixers; ΠP3; CMOS technology; LO stages; TSMC 0.13-μm process; down-conversion mixer; folded double-balanced Gilbert cell topology; frequency 6 GHz to 15 GHz; gain 2.3 dB to 4.2 dB; high-band applications; on-chip inductors; power 4.8 mW; size 0.13 mum; third-order inter-modulation intercept point; transconductance stages; voltage 1.2 V; 1f noise; CMOS integrated circuits; Inductors; Mixers; Radio frequency; Resonant frequency; Switches; TSMC 0.13-μm; double-balanced; mixer;

fLanguage

English

Publisher

ieee

Conference_Titel

Antennas and Propagation (APCAP), 2014 3rd Asia-Pacific Conference on

Conference_Location

Harbin

Print_ISBN

978-1-4799-4355-5

Type

conf

DOI

10.1109/APCAP.2014.6992766

Filename

6992766