Towards a framework to perform DPA attack on GALS pipeline architectures

Differential power analysis (DPA) is a low cost method to extract secret information from supposedly secure cryptographic systems. DPA correlates the data processed with power consumption of the device through statistical analyses to unveil the secret key of the system. A common approach to counteract DPA is randomizing the data processing in order to misalign power consumption traces in time and amplitude domains using strategies such as random delay insertion and random clock frequency. The combination of strategies requires more computational effort for a successful DPA attack. This paper introduces the first steps toward a framework to compromise cryptographic systems that combine misalignment strategies to hide leakage information. The steps of the proposed framework are discussed in terms of computational efforts and successful attacks rate. The results obtained in an architecture prototyped on FPGA show that noise filtering can significantly improve the DPA success rate. Furthermore, clustering traces by frequency allow the improvement of the alignment step, thus increasing about 40 times the efficiency of the DPA attack to the cost of an increase of the computational efforts.