DocumentCode
1778630
Title
Design and implementation of a pipelined decoder for generalized concatenated codes format
Author
Spinner, Jens ; Freudenberger, Jurgen
Author_Institution
Inst. for Syst. Dynamics (ISO), Univ. of Appl. Sci., Konstanz, Germany
fYear
2014
fDate
1-5 Sept. 2014
Firstpage
1
Lastpage
6
Abstract
This article proposes a pipelined decoder architecture for generalized concatenated codes (GCC). These codes are constructed from inner binary Bose-Chaudhuri-Hocquenghem (BCH) and outer Reed-Solomon codes. The decoding of the component codes is based on hard decision syndrome decoding algorithms. The concatenated code consists of several small BCH codes. This enables a hardware architecture where the decoding of the component codes is pipelined. A hardware implementation of a GCC decoder is presented and the cell area, cycle counts as well as the timing constraints are investigated. The results are compared to a decoder for long BCH codes with similar error correction performance. In comparison, the pipelined GCC decoder achieves a higher throughput and has lower area consumption.
Keywords
BCH codes; Reed-Solomon codes; binary codes; concatenated codes; error correction codes; BCH codes; Bose-Chaudhuri-Hocquenghem codes; binary codes; error correction; generalized concatenated codes format; hard decision syndrome decoding; hardware architecture; outer Reed-Solomon codes; pipelined decoder architecture; timing constraints; Abstracts; Calculators; Decoding; Pipelines; Bose-Chaudhuri-Hocquenghem codes; Reed-Solomon codes; decoder architecture; generalized concatenated codes;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits and Systems Design (SBCCI), 2014 27th Symposium on
Conference_Location
Aracaju
Type
conf
DOI
10.1145/2660540.2661003
Filename
6994655
Link To Document