Designing test patterns for effective measurement of typical TSV pairs in a silicon interposer

In this paper, practical test patterns are designed to calculate the characteristics of Through-Silicon Via (TSV) pairs in a silicon interposer. Proposed test patterns include probing pads, traces and TSVs, which are modeled by a combination of impedances and admittances. Performance of the test patterns is obtained from simulation models built in full wave simulation solver. TSV response is then obtained by de-embedding the pad and trace from the test patterns. The TSV response is also verified by analytical TSV characterization and full wave simulation results for only TSV structures. Thus the paper provides a guide to design feasible test structures from which true response of a TSV pair can be derived.