A 240 GHz multiplier chain with −0.5 dBm output power in SiGe BiCMOS technology

Author

Ben Yishay, Roee ; Elad, Danny

Author_Institution

IBM Haifa Res. Lab., Haifa, Israel

fYear

2014

fDate

6-7 Oct. 2014

Firstpage

297

Lastpage

300

Abstract

A 240GHz ×4 frequency multiplier chain implemented in a f_T/f_MAX = 200/250GHz commercially available 0.12μm SiGe BiCMOS technology is presented. The chain achieves a peak output power of -0.5dBm (0.9mW) and consists of two balanced doublers driven by a differential two stages cascode power amplifier. It operates from 232GHz to 246GHz (3 dB power bandwidth) with 5dBm input power at 60GHz and consumes a total DC power of 520mW. The D-Band PA achieves output 1dB compression point and saturated power of 11.2 and 15.3dBm, respectively at 120GHz and 15.5dB small signal gain.

Keywords

BiCMOS integrated circuits; Ge-Si alloys; frequency multipliers; power amplifiers; BiCMOS technology; SiGe; balanced doublers; differential two stages cascode power amplifier; frequency 120 GHz; frequency 232 GHz to 246 GHz; frequency 240 GHz; frequency 60 GHz; frequency multiplier chain; gain 15.5 dB; power 0.9 mW; power 520 mW; size 0.12 mum; Bandwidth; BiCMOS integrated circuits; Impedance matching; Power amplifiers; Power generation; Power measurement; Silicon germanium; D-Band; Frequency Doubler; H-Band: SiGe BiCMOS; Power Amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

European Microwave Integrated Circuit Conference (EuMIC), 2014 9th

Conference_Location

Rome

Type

conf

DOI

10.1109/EuMIC.2014.6997851

Filename

6997851