• DocumentCode
    1789077
  • Title

    Design, optimization and verification of switch board controller

  • Author

    Panwar, Adesh

  • Author_Institution
    MR Div., BEL, Bangalore, India
  • fYear
    2014
  • fDate
    10-11 Oct. 2014
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    A serial interface module based on FPGA platform is designed for data communication between the operator console and Fire Control Computer. Various techniques adopted during the design and optimizations are presented in this paper. The module is developed using VHDL language and is integrated onto a SOC to achieve compact, stable and reliable communication. It supports different baud rates. In the optimized design logic, resource consumption is reduced by 11% and power dissipation is reduced by 15%. The verification results indicate that the optimized design can communicate correctly and steadily at typical baud rate of 19200 bits/sec.
  • Keywords
    field programmable gate arrays; hardware description languages; logic design; system-on-chip; FPGA platform; SOC; VHDL language; baud rates; data communication; fire control computer; optimized design logic; serial interface module; switch board controller design; switch board controller optimization; switch board controller verification; Field programmable gate arrays; Logic gates; Optimization; Registers; Switches; Timing; Optimization; Serial Communication;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Advances in Electronics, Computers and Communications (ICAECC), 2014 International Conference on
  • Conference_Location
    Bangalore
  • Type

    conf

  • DOI
    10.1109/ICAECC.2014.7002439
  • Filename
    7002439