An area-efficient capacitively-coupled instrumentation amplifier with a duty-cycled Gm-C DC servo loop in 0.18-μm CMOS

Author

Chih-Chan Tu ; Feng-Wen Lee ; Tsung-Hsien Lin

Author_Institution

Nat. Taiwan Univ., Taipei, Taiwan

fYear

2014

fDate

10-12 Nov. 2014

Firstpage

153

Lastpage

156

Abstract

A chopped capacitively-coupled instrumentation amplifier (CCIA) with a proposed duty-cycled Gm-C DC servo loop (DSL) for bio-potential signal acquisition is presented. The proposed architecture realizes a large time constant with small circuit area without sacrificing noise and power performance. Furthermore, this pseudo-resistor-less design grants this architecture easily portable for more advanced processes. Fabricated in a 0.18-μm CMOS, this chip draws 2.37 μA from a 1.8-V supply and occupies only an active area of 0.43 mm². The total integrated noise from 0.5 to 100 Hz is 1.04 μV_rms and results in a noise efficiency factor of 7.8.

Keywords

CMOS integrated circuits; bioelectric potentials; instrumentation amplifiers; CMOS integrated circuit; DC servo loop; area efficient capacitively coupled instrumentation amplifier; biopotential signal acquisition; chopped capacitively coupled instrumentation amplifier; current 2.37 muA; pseudoresistor-less design; size 0.18 mum; voltage 1.8 V; Capacitors; Choppers (circuits); DSL; Electroencephalography; Instruments; Noise; Switches;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian

Conference_Location

KaoHsiung

Print_ISBN

978-1-4799-4090-5

Type

conf

DOI

10.1109/ASSCC.2014.7008883

Filename

7008883