DocumentCode
1797076
Title
A 10b 100kS/s SAR ADC with charge recycling switching method
Author
Kai-Hsiang Chiang ; Soon-Jyh Chang ; Guan-Ying Huang ; Ying-Zu Lin
Author_Institution
Dept. of Electr. Eng., Nat. Cheng Kung Univ., Tainan, Taiwan
fYear
2014
fDate
10-12 Nov. 2014
Firstpage
329
Lastpage
332
Abstract
This paper presents a low-voltage and energy-efficient 10b SAR ADC which manipulates charge recycling switching method for saving the switching energy. In additional, a window-based reconfigurable comparator is used to achieve fast comparison and small power dissipation. The proposed 10b SAR ADC operates at 100kS/s with 0.4V supply voltage in 90nm CMOS. The measurement results show that the prototype ADC achieve 55.37dB SNDR at Nyquist rate with only 107nW. The Figure-of-Merit (FoM) is 2.23fJ/conv.-step.
Keywords
CMOS digital integrated circuits; Nyquist criterion; analogue-digital conversion; comparators (circuits); switching convertors; CMOS; FoM; Nyquist rate; SAR ADC; charge recycling switching method; figure-of-merit; power 107 nW; power dissipation; size 90 nm; switching energy; voltage 0.4 V; window-based reconfigurable comparator; CMOS integrated circuits; Capacitors; Linearity; Power demand; Recycling; Signal to noise ratio; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Circuits Conference (A-SSCC), 2014 IEEE Asian
Conference_Location
KaoHsiung
Print_ISBN
978-1-4799-4090-5
Type
conf
DOI
10.1109/ASSCC.2014.7008927
Filename
7008927
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