Adaptation of high level behavioral models for stuck-at coverage analysis

There has been increasing effort in the years for defining test strategies at the behavioral level. Due to the lack of suitable coverage metrics and tools to assess the quality of a testbench, these strategies have not been able to play an important role in stuck-at fault simulation. The work we are presenting here proposes a new coverage metric that employs back-annotation of post-synthesis design properties into pre-synthesis simulation models to estimate the stuck-at fault coverage of a testbench. The effectiveness of this new metric is evaluated for several example circuits. The results show that the new metric provides a good evaluation of high level testbenches for detection of stuck-at faults.